Test MP+dmb+[fr-rf]-addr

Executions for behaviour: "1:R0=2 ; 1:R1=1 ; 1:R3=1 ; y=2"

ARM MP+dmb+[fr-rf]-addr
"DMBdWW Rfe FrLeave RfBack DpAddrdR Fre"
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMBdWW Rfe FrLeave RfBack DpAddrdR Fre
{
%x0=x; %y0=y;
%y1=y; %x1=x;
%y2=y;
}
 P0           | P1              | P2           ;
 MOV R0,#1    | LDR R0,[%y1]    | MOV R0,#2    ;
 STR R0,[%x0] | LDR R1,[%y1]    | STR R0,[%y2] ;
 DMB          | EOR R2,R1,R1    |              ;
 MOV R1,#1    | LDR R3,[R2,%x1] |              ;
 STR R1,[%y0] |                 |              ;
Observed
    1:R0=2; 1:R1=1; 1:R3=1; y=2;